During a grid fault, inverter-based resources (IBRs) like BESS must not disconnect; they must remain online and inject reactive current to help stabilize the voltage. This engineering analysis covers the technical challenges of achieving Fault Ride-Through (FRT) compliance.
LVRT and HVRT Dynamics
Low Voltage Ride-Through (LVRT) requires the inverter to withstand voltage sags (e.g., down to 10% of nominal) for a specified duration, while High Voltage Ride-Through (HVRT) handles temporary overvoltages. We dissect the specific V-t profiles mandated by grid codes and how inverter firmware must rapidly transition from active power control to reactive power priority.
Hardware Sizing and Thermal Capacity
Injecting maximum reactive current during a severe voltage dip places immense stress on the inverter's power electronics. We explore the necessity of over-sizing the DC-link capacitors to manage voltage ripples and upgrading the Insulated-Gate Bipolar Transistors (IGBTs) to handle the transient thermal loads without triggering self-protection shutdowns.
Phase-Locked Loop (PLL) Stability
A critical component of FRT is the Phase-Locked Loop (PLL), which synchronizes the inverter to the grid voltage angle. During a fault, the grid voltage is highly distorted. We discuss advanced PLL algorithms necessary to maintain synchronization and prevent inverter tripping during severe asymmetrical grid disturbances.
Engineering Practice Directorate
Power Electronics Team
Ultrathon Electric's multidisciplinary engineering division prepares technical analyses, grid-code evaluations, and safety briefs to assist utilities, independent power producers (IPPs), and investors in navigating utility-scale energy storage and renewable deployments.
